{"rewrite":{"id":"r_f392a8f2ea2827886c207785","clusterId":"c_526ff3e593e822dd01776a96","slug":"nvidia-uses-vera-cpu-to-speed-up-next-generation-chip-design","model":"deepseek-v4-flash:free","headline":"NVIDIA Uses Vera CPU to Speed Up Next-Generation Chip Design","summary":"NVIDIA is using its Vera CPU to accelerate the design of future CPUs and GPUs. Early tests on key verification and simulation workloads show up to 1.5x performance gains. The company is working with Cadence and Synopsys to optimize EDA applications for Vera, and plans to continue with the next-generation Rosa CPU.","whyItMatters":"NVIDIA is applying its own CPU to the chip design process, showing that CPU architecture remains a bottleneck even as GPUs and AI streamline design work.","webCardHtml":"\u003cp\u003eNVIDIA is turning its Vera CPU on the problem of designing its own next-generation chips. The company said that as engineering teams tackle more advanced CPUs, GPUs, and AI systems, design complexity is growing. To handle it, NVIDIA is working with Cadence and Synopsys to optimize electronic design automation (EDA) and system design and analysis (SDA) applications for Vera.\u003c/p\u003e\u003cp\u003eEarly tests across several major EDA applications show Vera can speed up two of the most compute-intensive steps in modern chip design, with up to 1.5x performance gains on key verification and simulation workloads. NVIDIA is deploying Vera across its EDA workflow to shorten verification time and boost throughput, letting engineers evaluate more design options in the same development period.\u003c/p\u003e\u003cp\u003eNVIDIA frames the move as part of a broader strategy to match each workload with the best computer architecture. Looking ahead, the company plans to evolve Vera further and drive the next-generation Rosa CPU with NVIDIA Rigel cores, continuing optimization of key EDA applications across its CPU roadmap.\u003c/p\u003e","blueskyPost":"NVIDIA is using its Vera CPU to design its next chips. Early EDA tests show up to 1.5x gains on verification and simulation workloads. Cadence and Synopsys are helping optimize apps for Vera. Next up: the Rosa CPU with Rigel cores.","twitterPost":"NVIDIA is using its Vera CPU to design its next-gen chips. Early EDA tests show up to 1.5x gains on verification and simulation workloads. Cadence and Synopsys are optimizing apps for Vera. Next: Rosa CPU with Rigel cores.","threadsPost":null,"newsletterBlurb":"NVIDIA is using its Vera CPU to accelerate the design of its next-generation chips. Early tests on key EDA workloads show up to 1.5x performance gains, with Cadence and Synopsys helping optimize applications. The company plans to continue with the Rosa CPU.","attributionJson":"[{\"source\":\"GIGAZINE\",\"url\":\"https://gigazine.net/news/20260729-nvidia-vera-cpu-to-speed-up-next-generation/\",\"title\":\"NVIDIAはVera CPUで次世代チップ開発を加速中、すでに最大1.5倍の性能向上を確認\"}]","lintFlagsJson":null,"lintHits":0,"costUsd":0,"inputTokens":5021,"outputTokens":636,"status":"published","repairAttempts":0,"nextRepairAt":null,"factsAttemptedAt":1786254105,"createdAt":"2026-08-09T05:33:21.000Z","publishedAt":"2026-08-09T05:36:44.000Z","updatedAt":"2026-08-09T05:33:21.000Z"},"cluster":{"id":"c_526ff3e593e822dd01776a96","canonicalTitle":"NVIDIAはVera CPUで次世代チップ開発を加速中、すでに最大1.5倍の性能向上を確認","representativeArticleId":"a_6c306b7de7a632470e99bc25","sourceCount":1,"writtenSourceCount":1,"writeAttempts":0,"isSolo":true,"entitiesJson":"{\"anime_titles\":[],\"manga_titles\":[],\"work_titles\":[],\"studios\":[],\"people\":[],\"type\":\"news\",\"domain\":\"other\",\"is_roundup\":false}","contentType":"news","status":"published","firstSeenAt":"2026-07-29T00:47:00.000Z","lastSeenAt":"2026-07-29T00:47:00.000Z","updatedAt":"2026-08-09T05:36:44.000Z"},"attribution":[{"source":"GIGAZINE","url":"https://gigazine.net/news/20260729-nvidia-vera-cpu-to-speed-up-next-generation/","title":"NVIDIAはVera CPUで次世代チップ開発を加速中、すでに最大1.5倍の性能向上を確認"}],"entities":{"anime_titles":[],"manga_titles":[],"work_titles":[],"studios":[],"people":[],"type":"news","domain":"other","is_roundup":false},"keyFacts":null}