{"rewrite":{"id":"r_83aa1095385710edde774367","clusterId":"c_7c1d5da12da652d74509e154","slug":"meta-builds-a-chip-to-reuse-old-server-memory-in-new-servers","model":"deepseek-v4-flash","headline":"Meta Builds a Chip to Reuse Old Server Memory in New Servers","summary":"Meta announced a custom ASIC called Vistara that uses the CXL interconnect to connect old DDR4 memory to new DDR5 servers. The chip addresses a common data center problem where usable memory is scrapped when servers are retired. Meta is already running Vistara in production, reporting a 25 percent reduction in server count for ML inference and a 29 percent reduction in query time for a cache workload.","whyItMatters":"Meta's Vistara chip turns a hardware incompatibility problem into a cost-saving production tool, with measurable performance gains already in deployment.","webCardHtml":"\u003cp\u003eMeta presented the Vistara chip at the ISCA 2026 conference in late June. The chip is a custom ASIC that uses the CXL interconnect to attach old DDR4 memory to servers built for DDR5, solving a mismatch that normally forces operators to scrap usable memory when retiring servers after three to five years. Meta reports that about 44 percent of its general-purpose CPU servers are limited by memory capacity, and that DRAM can last seven to ten years, longer than the server body. The company is already running Vistara-based systems in production for recommendation inference, distributed cache, and large-scale data processing, and says it cut the number of servers needed for ML parameter serving by up to 25 percent and reduced average query time in one cache workload by 29 percent.\u003c/p\u003e","blueskyPost":"Meta's Vistara chip reuses old DDR4 memory in new DDR5 servers via CXL. Already in production, it cut server count by 25% in ML inference and reduced query time by 29% in cache workloads. A practical fix for a common data center waste problem.","twitterPost":"Meta's Vistara chip reuses old DDR4 memory in new DDR5 servers via CXL. In production, it cut server count by 25% in ML inference and reduced query time by 29% in cache workloads. A practical fix for data center memory waste.","threadsPost":null,"newsletterBlurb":"Meta announced a custom ASIC called Vistara that connects old DDR4 memory to new DDR5 servers using the CXL standard. The chip is already in production, reducing server requirements by up to 25 percent in recommendation system inference and cutting query latency by 29 percent in a distributed cache workload. The design was presented at the ISCA 2026 conference.","attributionJson":"[{\"source\":\"GIGAZINE\",\"url\":\"https://gigazine.net/news/20260710-meta-vistara/\",\"title\":\"Meta Announces Proprietary Chip 'Vistara' to Reuse DDR4 Memory from Old Servers in New Servers\"}]","lintFlagsJson":null,"lintHits":0,"costUsd":0,"inputTokens":4285,"outputTokens":1616,"status":"published","repairAttempts":0,"nextRepairAt":null,"factsAttemptedAt":1783758928,"createdAt":"2026-07-11T08:23:28.000Z","publishedAt":"2026-07-11T08:27:28.000Z","updatedAt":"2026-07-11T08:23:28.000Z"},"cluster":{"id":"c_7c1d5da12da652d74509e154","canonicalTitle":"Metaが古いサーバーのDDR4メモリを新型サーバーで再利用する独自チップ「Vistara」を発表","representativeArticleId":"a_d795db8b57875fed783b5964","sourceCount":1,"writtenSourceCount":1,"writeAttempts":0,"isSolo":true,"entitiesJson":"{\"anime_titles\":[],\"manga_titles\":[],\"work_titles\":[],\"studios\":[],\"people\":[],\"type\":\"announcement\",\"domain\":\"other\",\"is_roundup\":false}","contentType":"news","status":"published","firstSeenAt":"2026-07-10T10:00:00.000Z","lastSeenAt":"2026-07-10T10:00:00.000Z","updatedAt":"2026-07-11T08:27:29.000Z"},"attribution":[{"source":"GIGAZINE","url":"https://gigazine.net/news/20260710-meta-vistara/","title":"Metaが古いサーバーのDDR4メモリを新型サーバーで再利用する独自チップ「Vistara」を発表"}],"entities":{"anime_titles":[],"manga_titles":[],"work_titles":[],"studios":[],"people":[],"type":"announcement","domain":"other","is_roundup":false},"keyFacts":null}