{"rewrite":{"id":"r_21edaff30bc8a60a3373ce62","clusterId":"c_6e667acce8631470f28ad9ac","slug":"fujitsu-s-monaka-pairs-tsmc-2nm-cores-with-5nm-dies-for-hpc","model":"deepseek-v4-1-flash","headline":"Fujitsu's Monaka Pairs TSMC 2nm Cores With 5nm Dies for HPC","summary":"Fujitsu's Arm-based server CPU Monaka, successor to the A64FX, targets HPC with a 144-core design split across four pairs of core dies. The core dies use TSMC's N2P process while the SRAM and IO dies use 5nm, stacked on a silicon interposer. Monaka carries DDR5-8000 memory across 12 channels and a 256-bit SVE2 implementation. FP64 support is in scope; NVLink Fusion is deferred to the next-generation Monaka-X.","whyItMatters":"Monaka keeps FP64 and general-purpose cores in view while its designers treat the most advanced process as necessary only for the logic that needs it, which separates the chip's priorities from AI-specialized designs.","webCardHtml":"\u003cp\u003eFujitsu laid out the split behind Monaka at Hot Chips: core dies on TSMC N2P, SRAM and IO dies on 5nm, four pairs of core dies stacked on SRAM dies and wired through a silicon interposer. The reasoning is that SRAM density plateaus from around 5nm, so pushing the smallest node onto cache and register files buys little while raising manufacturing cost. The 144 cores work out to 36 per die. Memory is DDR5-8000 across 12 channels, which the presentation acknowledges is modest by current standards.\u003c/p\u003e","blueskyPost":"Fujitsu's Monaka splits its cores across four pairs of TSMC N2P dies and stacks them on a silicon interposer with 5nm SRAM and IO dies. The cost of that packaging may matter more than the 2nm node itself.","twitterPost":"Monaka puts 2nm compute on four core-die pairs over a silicon interposer. The 5nm SRAM and IO dies are where the cost question sits.","threadsPost":"Fujitsu's Monaka stacks four pairs of TSMC N2P core dies with 5nm SRAM and IO dies on a silicon interposer. That packaging mix, not the 2nm node alone, is what will decide whether the design holds up as an A64FX successor for HPC.","newsletterBlurb":"Fujitsu detailed Monaka, the A64FX successor, at Hot Chips. Core dies use TSMC N2P and SRAM dies use 5nm, stacked on a silicon interposer, with 144 cores total and DDR5-8000 across 12 channels. FP64 is in scope, and NVLink Fusion is held back for the next-generation Monaka-X.","attributionJson":"[{\"source\":\"ASCII.jp\",\"url\":\"https://ascii.jp/elem/000/004/443/4443519/?rss\",\"title\":\"An HPC Monster That Sets Itself Apart from AI-Specialized Chips! The True Value of Fujitsu's \\\"Monaka\\\" and Its 3D Stacking and 256-bit SVE2\"}]","lintFlagsJson":null,"lintHits":0,"costUsd":0,"inputTokens":4720,"outputTokens":630,"status":"published","repairAttempts":0,"nextRepairAt":null,"factsAttemptedAt":1792383737,"createdAt":"2026-10-19T04:17:51.000Z","publishedAt":"2026-10-19T04:21:10.000Z","updatedAt":"2026-10-19T04:21:10.000Z"},"cluster":{"id":"c_6e667acce8631470f28ad9ac","canonicalTitle":"AI特化とは一線を画すHPCの怪物！ 富士通「Monaka」が目指す3D積層と256bit SVE2の真価","representativeArticleId":"a_ad6559687f07e86c733e4e92","sourceCount":1,"writtenSourceCount":1,"writeAttempts":0,"isSolo":true,"entitiesJson":"{\"anime_titles\":[],\"manga_titles\":[],\"work_titles\":[\"Monaka\"],\"studios\":[\"Fujitsu\"],\"people\":[],\"type\":\"news\",\"domain\":\"other\",\"is_roundup\":false}","contentType":"news","status":"published","firstSeenAt":"2026-10-19T03:00:00.000Z","lastSeenAt":"2026-10-19T03:00:00.000Z","updatedAt":"2026-10-19T04:21:08.000Z"},"attribution":[{"source":"ASCII.jp","url":"https://ascii.jp/elem/000/004/443/4443519/?rss","title":"AI特化とは一線を画すHPCの怪物！ 富士通「Monaka」が目指す3D積層と256bit SVE2の真価"}],"entities":{"anime_titles":[],"manga_titles":[],"work_titles":["Monaka"],"studios":["Fujitsu"],"people":[],"type":"news","domain":"other","is_roundup":false},"keyFacts":null}